Verilog数字逻辑电路设计
Date:2020-12-11 clicks:
Leader of Teaching Group:曹永忠
Venue:文萃楼316
Schedule: 上课周次:7-18周 星期2 节次:1-3
Target Students:本科生
Teacher:曹永忠
School Year:2017-2018
Semester:Autumn Term
Credits:1.5
Course Type:Undergraduate Course:
Top-Quality Courses or Not:no
Required Class Hours:24.0