数字电路与逻辑设计
- Leader of Teaching Group:李志强
- Venue:文荟楼123
- Schedule: 上课周次:1-10周 星期4 节次:3-5
- Target Students:本科生
- Teacher:李志强
- School Year:2017-2018
- Semester:Spring Term
- Credits:3.5
- Course Type:Undergraduate Course:
- Top-Quality Courses or Not:no
- Required Class Hours:64.0
Pre One:
NIIT嵌入式模块Ⅳ(2)
Next One:
NIIT嵌入式模块Ⅳ(2)